Invention Title:

NEUROMORPHIC METHOD AND APPARATUS WITH MULTI-BIT NEUROMORPHIC OPERATION

Publication number:

US20250322227

Publication date:
Section:

Physics

Class:

G06N3/063

Inventors:

Assignee:

Applicant:

Smart overview of the Invention

The neuromorphic apparatus processes multi-bit operations using a single axon circuit, synaptic circuit, neuron circuit, and a controller. The axon circuit receives an i-th bit from an n-bit axon as input, while the synaptic circuit stores a j-th bit from an m-bit synaptic weight. Together, they produce a synaptic operation value. The neuron circuit uses this value to determine each bit of the neuromorphic operation result between the axon and synaptic weight. The controller assigns bits to circuits over different time periods, ensuring sequential processing from lower to upper bit values.

Functionality

The controller manages the sequential assignment of i-th and j-th bits across time periods, facilitating the multi-bit operation result. It maps these bits to combine them differently over time, changing their values in ascending order. The total combinations of these bits equal the product of n and m. During these periods, each circuit processes a single bit value, and the neuron circuit employs a single adder to sum synaptic operation values, contributing to the final operation result.

Neuron Circuit Operations

The neuron circuit's single adder performs addition using inputs like a pre-set initial value, synaptic operation values from current and previous periods, and carry values. The adder's outputs, such as addition and carry values, correspond to bits of the operation result. It can reuse these outputs to compute subsequent bits, ensuring efficient processing. The controller ensures the sequential acquisition of bits from the least significant to the most significant bit (LSB to MSB).

Methodology

The method involves assigning i-th and j-th bits to the axon and synaptic circuits, respectively, for each time period. The synaptic circuit outputs a synaptic operation value, which the neuron circuit uses to derive each bit of the operation result. This sequential process continues until the entire result is obtained. The single adder aggregates synaptic operation values, utilizing previous and current period inputs to compute each bit value.

Applications and Advantages

By leveraging a single circuit for axon, synaptic, and neuron operations, the apparatus optimizes resource use and potentially enhances processing speed. This design supports various neural networks, such as CNNs and RNNs, making it suitable for tasks like data classification and image recognition. The apparatus's ability to efficiently process multi-bit operations could lead to advancements in neuromorphic computing applications.