Self-Adaptive Multi-Conversion Gain Pixel

Smart overview of the Invention

The patent application discloses a novel structure for implementing selective conversion gain circuitry in pixel circuits. This approach involves conversion gain selection gates that allow for choosing between full well capacity and partial well capacities in the floating diffusion region. By enabling both column-wise and row-wise control, it allows for independent selection of conversion gain across various pixel circuits within an image sensor. The design also introduces techniques for determining conversion gain selection based on readout signals from preceding photodiodes.

The technology is relevant to CMOS image sensors, particularly those with dual-conversion-gain (DCG) and multi-conversion-gain (MCG) pixels. These pixels are crucial for achieving low noise and high dynamic range in image sensor devices. DCG pixels can read photoelectron signals at two different gains, while MCG pixels can handle three or more gains. This flexibility is important for adapting to varying illumination conditions, offering both high conversion gain (HCG) and low conversion gain (LCG) modes.

The patent details a schematic of a DCG pixel, illustrating components such as the photodiode, transfer gate transistor, floating diffusion region, and other transistors that control the readout process. The DCG transistor plays a key role by splitting the floating diffusion region into two parts, enabling the switch between LCG and HCG modes. This switching is crucial for managing well capacities and optimizing signal readouts under different lighting conditions.

Challenges with traditional DCG/MCG pixel readouts include increased line time, reduced frame rate, and higher power consumption due to multiple readouts. The invention addresses these issues by introducing localized control of conversion gain through row and column logic addressing. This allows for determining the conversion gain of a pixel based on signals from neighboring pixels, reducing the need for multiple frame readouts and thus enhancing efficiency.

A schematic of a pixel circuit with a conversion gain selection circuit is presented, showing an array of four photodiodes connected to a single floating diffusion region. This setup can be part of larger pixel arrays like a Quadra color filter array. The design supports single-frame data readout per pixel, optimizing the benefits of DCG/MCG pixels without compromising frame rate or power efficiency.