US20260010794
2026-01-08
Physics
G06N3/082
The patent application details a method for analyzing uncertainty in multi-modal machine learning systems. It focuses on generating uncertainty estimates for each data modality and the overall system using a multi-modal fusion architecture and dropout analysis. The system processes each modality independently before combining results in a fusion layer to make a final prediction. Uncertainty is quantified using statistical measures like standard deviation derived from Monte Carlo Dropout samples.
Two innovative metrics, Model Predictive Importance (MPI) and Uncertainty-based Modality Importance (UMI), are introduced to assess modality importance. MPI evaluates the alignment between individual modality predictions and the overall system prediction, while UMI measures the gradient of model variance concerning internal layers within the fusion module. These metrics help determine the contribution of each modality to the system's prediction accuracy.
The system employs a generalizable, multi-modal fusion architecture, enabling independent processing of each modality. Monte Carlo dropout is applied to estimate uncertainty for each modality and the entire system post-fusion. The architecture supports various neural network workflows, providing reliable modality-specific uncertainty scores that contribute to improved classification performance.
The described system includes components such as classifier circuitry for processing multi-modal data, a model datastore for storing trained models, and an uncertainty analyzer circuitry. This setup allows the system to generate classification predictions and corresponding uncertainty outputs, enhancing the model's reliability and trustworthiness in real-world applications.
The uncertainty analyzer circuitry comprises various components including dropout, uncertainty, and importance analyzers. These components work together to perform dropout analysis, such as Monte Carlo dropout, across modalities. The system can be implemented using various programmable circuits, including CPUs, FPGAs, and ASICs, allowing flexibility in deployment across different hardware configurations.