US20260143735
2026-05-21
Electricity
H10D30/481
A semiconductor device is designed using a channel layer composed of van der Waals materials, which offers enhanced control over electrical properties. The structure includes an interlayer that may consist of either a semiconductor or an insulator, embedded with a dopant. This interlayer is integral to the overall function, acting as a seed layer for the gate insulating layer and a doping layer for the channel. The gate insulating layer and gate electrode are sequentially positioned above the interlayer, ensuring effective separation and functionality.
The channel layer may incorporate materials such as two-dimensional semiconductors, graphene, carbon nanotubes, or phosphorene. Specific examples of two-dimensional materials include MoS2, WS2, and others. The interlayer is formed using physical vapor deposition (PVD) methods and can contain elements like Si, Ge, or group III-V semiconductor compounds. The doping concentration within the interlayer is maintained at 1×1013 cm−3 or greater, with the interlayer's thickness being 1 nm or less.
The semiconductor device may also feature a lower gate electrode and insulating layer beneath the channel layer, providing additional control. It can include multiple channel layers and interlayers, allowing for complex device architectures. The design supports both N-type and P-type field-effect transistors (FETs), which can exhibit varying threshold voltages despite using the same base material, due to differences in doping concentrations.
The manufacturing process involves creating the channel layer with van der Waals material, followed by forming the interlayer using PVD. The gate insulating layer and gate electrode are subsequently added. This method allows for precise control of doping concentrations and interlayer thickness, crucial for achieving desired electrical properties in the final device.
This semiconductor device can be integrated into electronic devices, where it is controlled by a dedicated controller. The architecture and materials used offer potential improvements in device miniaturization and performance, addressing challenges associated with short channel effects in modern transistors. The ability to adjust threshold voltages reliably makes it suitable for advanced logic products requiring multiple voltage levels.