US20260227961
2026-08-06
Physics
G06F8/30
The patent application discusses methods and systems for detecting and addressing power side channels in semiconductor architecture and microarchitecture. It involves determining a power side channel of a hardware representative system by constructing a power consumption relation based on instructions. Executable code is generated from this relation, and its execution reveals the power consumption result, which helps in adjusting the architecture and microarchitecture according to a power leakage metric.
Semiconductors are crucial for modern electronics, from smartphones to advanced vehicle systems. These chips, containing billions of devices, are expensive and complex to design. Side channel attacks (SCAs) exploit physical parameters like power consumption to extract secrets from systems, especially those with cryptographic modules. SCAs pose significant threats by indirectly affecting program execution and are challenging to mitigate post-fabrication.
The application provides a method for detecting and addressing power side channels by determining power consumption results and constructing power consumption relations. It includes computer-implemented methods, computer systems, and computer-readable storage media. The approach involves extracting power consumption results and using them to adjust system architecture to minimize power leakage, enhancing security against SCAs.
Power side channels arise from semiconductor design, where power consumption correlates with device operations. SCAs exploit these channels to extract sensitive information without direct system interaction. Existing solutions are costly and focus on post-fabrication mitigation, lacking a systematic approach to address potential side channels early in the design process. The application proposes early-stage evaluation and adjustment of microarchitecture to prevent such vulnerabilities.